The CAN(Controller area network) Bus Verification IP (VIP) is a solution for verification of CAN2.0 designs. The provided verification package includes CAN2.0 verification IP, integration examples and extensive test suit which covers most of the scenarios defined in the ISO/DIS 16845(Conformance test plan). The VIP is fully compliant with CAN2.0B specification and can be very powerful tool to check, monitor and debug the CAN2.0-Bus protocol.
You can download the CAN2.0-Bus Verification IP from Downloads page.
- Compliant to the CAN2.0B specification
- Supports all frame types: Data frames, Remote frames, Error frames Overload frames
- Automatic response to the remote frames
- Supports all error types: Bit errors, Stuff errors, CRC errors, Form errors, Acknowledgment error
- Automatic re-transmission of the corrupted data or remote frames
- Programmable TX and RX error counters
- Supports all types of error injection
- Supports programmable bus idle insertion between data frames
- Supports data or remote frame transmission at the 3rd intermission bit
- Automatic overload frame transmission after data or remote frames
- Separate RX data buffers for each identifiers
- Suports full debug frame transmission to test all posible corner cases
- Extensive status report
- Full duplex
- Easy integration and usage
- Free SystemVerilog source code
- Download the CAN2.0 Verification IP and unpack it.
- If you want to run examples
- Go to the following folder: <unpack_dir>/can_vip/examples/sim
- For VCS type the following command: vcs -f file_list.f -sverilog
- For QuestaSim6.4 type the following command: qverilog -f file_list.f
- Please read the CAN-Bus Verification IP User Manual.
If you have any questions please don’t hesitate to contact me.
You can also use article comments below to ask your questions, to report about bugs or to tell some ideas for future improvement. Your comments are always welcome!