dataOutBuff.push_back(this.tr.dataByte);

I try run VIP in cadence IUS8.2 and have next errors:

irun: *N,CLEAN: Removing existing directory ./INCA_libs.
dataOutBuff = {dataOutBuff, this.tr.dataByte};
|
ncvlog: *E,TYCMPAT (spi_s.sv,242|20): assignment operator type check failed (expecting datatype compatible with ‘queue of bit8′ but found ‘packed array’ instead).
dataOutBuff = {dataOutBuff, this.tr.dataByte};
|
ncvlog: *E,TYPEERR (spi_s.sv,242|31): {} concatenation operator operand type is illegal.

Best regards,
Poluekt

Could you please send me an e-mail with the short description of your SPI module?

Bests,
Tiksan

I use VHDL and Verilog and am not conversant with SystemVerilog. However, I agree that verification efficiency, quality and reusability is increased with the type of abstraction offered by languages such as SystemVerilog. So I need to get myself trained really.

In the meantime, I have a spi_slave module written in Verilog, and was wondering whether you could offer some pointers on how I can integrate my Verilog module with your SPI verification IP? The module implementation is close to the hardware (as is usually Verilog or VHDL code) and for instance, it has a system clk input which is not in your spi_slave interface.

Thanks in advance for any advice.
Harry